framework,version,device,op_name,kernel_source,bmm_dtype,num_tokens,num_heads,latency
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,128,0.006857600063085556
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,64,0.004518400132656098
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,32,0.006246399879455566
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,16,0.004419200122356415
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,8,0.004335999861359597
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,2,0.004112000018358231
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,1,0.004208000004291534
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1,4,0.004300799965858459
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,64,0.004556800052523613
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,128,0.006985600292682648
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,32,0.004668800160288811
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,16,0.004886399954557419
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,8,0.003929600119590759
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,2,0.0039935998618602754
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,4,0.004198399931192398
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2,1,0.0046847999095916745
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,32,0.004070400074124336
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,64,0.004540799930691719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,128,0.006543999910354615
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,16,0.0042559999972581865
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,8,0.004383999854326248
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,4,0.004374400153756142
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,2,0.004006399959325791
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,4,0.0043519999831914905
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4,1,0.004150399938225746
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,128,0.0067103996872901915
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,64,0.004646399989724159
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,32,0.004380799829959869
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,16,0.0040608000010252
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,8,0.004464000090956688
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,2,0.003999999910593033
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8,1,0.003932800143957138
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,128,0.006534399837255478
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,64,0.004307200014591217
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,32,0.0053311999887228016
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,16,0.004156799986958504
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,8,0.00419199988245964
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,16,0.004227200150489807
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,4,0.003929600119590759
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,2,0.003942399844527244
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,16,1,0.00421760007739067
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,128,0.006723199784755707
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,64,0.00448639988899231
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,32,0.004758400097489357
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,8,0.004108799993991852
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,4,0.00424639992415905
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,2,0.004284799844026565
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,32,1,0.004444799944758415
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,128,0.008675199747085572
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,64,0.004896000027656555
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,128,0.006652799993753433
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,32,0.004569600149989128
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,16,0.006028800085186958
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,8,0.004447999969124794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,4,0.004291199892759323
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,2,0.004502400010824204
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,48,1,0.004515200108289719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,64,0.005244800075888634
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,32,0.0046847999095916745
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,16,0.004732799902558327
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,8,0.005033599957823753
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,4,0.004179200157523155
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,8,0.005110400170087815
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,2,0.004342399910092354
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,64,1,0.0049056001007556915
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,128,0.006563200056552887
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,64,0.006384000182151794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,32,0.004793599992990494
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,16,0.00469760000705719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,4,0.004380799829959869
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,2,0.004639999940991402
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,80,1,0.004236799851059914
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,128,0.006777600198984146
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,64,0.006159999966621399
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,32,0.005062400177121162
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,16,0.004691199958324432
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,8,0.00459199994802475
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,4,0.004310400038957596
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,2,0.004675199836492538
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,96,1,0.00411520004272461
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,128,0.008687999844551087
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,64,0.0065760001540184024
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,128,0.00883520022034645
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,32,0.0048640001565217975
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,16,0.004575999826192856
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,8,0.0046016000211238865
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,4,0.004342399910092354
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,2,0.004774399846792221
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,128,1,0.004095999896526337
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,64,0.006534399837255478
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,32,0.006412799656391144
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,16,0.004783999919891357
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,8,0.0046016000211238865
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,16,0.004774399846792221
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,4,0.004492799937725067
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,2,0.004294399917125702
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,4,0.0049472000449895855
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,160,1,0.004691199958324432
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,128,0.01069760024547577
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,64,0.0067840002477169035
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,32,0.006169600039720535
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,8,0.005657599866390228
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,2,0.004560000076889992
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,4,0.004422400146722794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,192,1,0.004416000097990036
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,128,0.01085119992494583
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,1,0.004105599969625473
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,64,0.008659200370311737
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,32,0.006524799764156342
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,16,0.004652800038456917
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,8,0.004560000076889992
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,256,2,0.004422400146722794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,128,0.012873600423336028
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,1,0.004745600000023842
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,64,0.008640000224113464
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,128,0.014892800152301789
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,32,0.006470400094985962
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,16,0.0047136001288890835
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,8,0.004569600149989128
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,4,0.004460800066590309
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,320,2,0.004790399968624115
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,64,0.010652799904346467
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,32,0.006681600213050842
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,128,0.018857599794864656
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,16,0.00658240020275116
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,8,0.004860800132155419
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,4,0.004745600000023842
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,2,0.004524800181388855
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,384,1,0.004681599885225296
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,64,0.013558399677276612
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,32,0.008675199747085572
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,16,0.006598400324583054
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,8,0.00485760010778904
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,4,0.004195199906826019
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,2,0.005036799982190132
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,8,0.006393600255250931
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,512,1,0.004438399896025657
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,128,0.02720640003681183
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,64,0.014735999703407287
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,32,0.010598400235176086
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,16,0.006543999910354615
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,4,0.004848000034689904
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,2,0.004841599985957146
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,4,0.004822399839758873
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,768,1,0.004444799944758415
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,128,0.036668801307678224
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,64,0.018745599687099455
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,32,0.010678400099277497
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,16,0.008720000088214875
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,8,0.006534399837255478
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,2,0.004483199864625931
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1024,1,0.004067200049757957
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,2,0.004742399975657463
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,128,0.0485152006149292
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,64,0.027260801196098326
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,32,0.01485760062932968
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,16,0.01064639985561371
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,8,0.006764800101518631
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,4,0.006569600105285645
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,1536,1,0.004598399996757508
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,4,0.006566400080919266
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,128,0.06461120247840882
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,64,0.036374399065971376
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,64,0.049737599492073056
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,32,0.018931199610233308
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,16,0.010742399841547012
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,8,0.008671999722719193
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,2,0.0045471999794244765
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,2048,1,0.00461760014295578
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,128,0.09071040153503418
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,32,0.027004799246788024
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,16,0.01472959965467453
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,8,0.010655999928712846
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,4,0.0066880002617835995
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,8,0.010751999914646149
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,2,0.006579200178384781
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,3072,1,0.004732799902558327
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,128,0.11713600158691406
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,64,0.06467199921607972
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,32,0.03475199937820435
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,16,0.018918399512767792
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,4,0.008591999858617782
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,2,0.006457599997520447
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,4096,1,0.0046271998435258865
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,128,0.17220159769058227
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,64,0.0926144003868103
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,32,0.046902400255203244
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,16,0.027030399441719054
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,8,0.014707200229167938
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,4,0.01080000028014183
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,2,0.00660799965262413
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,6144,1,0.006438399851322174
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,128,0.2251136064529419
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,64,0.125164794921875
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,32,0.06222079992294312
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,16,0.03530240058898926
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,8,0.01735360026359558
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,4,0.010684800148010255
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,2,0.008640000224113464
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_pre,default,float16,8192,1,0.006390400230884552
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,128,0.004649600014090538
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,64,0.004575999826192856
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,32,0.004623999819159508
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,8,0.00456320010125637
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,16,0.004521600157022476
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,2,0.004387199878692627
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,128,0.0046271998435258865
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,1,0.004211200028657913
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1,4,0.004611200094223023
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,64,0.004473600164055824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,32,0.004508800059556961
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,16,0.004560000076889992
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,4,0.004438399896025657
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,8,0.004652800038456917
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,2,0.004329600185155868
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,128,0.004540799930691719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,16,0.004867200180888176
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,4,0.004278400167822838
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,2,0.004540799930691719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,64,0.004220800101757049
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,64,0.004575999826192856
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2,1,0.0042975999414920805
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,32,0.004441599920392036
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,4,0.004454400017857551
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,8,0.0044351998716592785
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4,1,0.004329600185155868
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,128,0.004771199822425842
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,128,0.0044351998716592785
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,32,0.004614400118589402
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,16,0.004595199972391129
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,16,0.004652800038456917
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,8,0.004569600149989128
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,2,0.004214400053024292
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8,1,0.004307200014591217
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,1,0.004438399896025657
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,64,0.0048351999372243885
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,32,0.00432640016078949
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,8,0.004720000177621841
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,4,0.005318399891257286
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16,2,0.004720000177621841
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,128,0.00631679967045784
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,64,0.004633599892258644
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,32,0.004636799916625023
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,16,0.004467200115323066
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,8,0.004447999969124794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,4,0.004508800059556961
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,2,0.004479999840259552
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,4,0.004515200108289719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,32,1,0.004422400146722794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,128,0.006425599753856659
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,64,0.004566400125622749
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,32,0.0044319998472929
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,16,0.0045056000351905824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,8,0.004387199878692627
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,2,0.004473600164055824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,48,1,0.004588799923658371
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,128,0.006489600241184235
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,64,0.00448639988899231
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,32,0.004527999833226204
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,16,0.004543999955058098
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,8,0.004479999840259552
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,4,0.004550400003790855
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,2,0.00459199994802475
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,64,1,0.004310400038957596
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,128,0.006390400230884552
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,64,0.004614400118589402
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,32,0.004521600157022476
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,16,0.00451200008392334
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,8,0.004735999926924706
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,4,0.004320000112056732
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,2,0.004467200115323066
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,80,1,0.004816000163555145
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,128,0.006415999680757523
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,64,0.004460800066590309
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,32,0.0045056000351905824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,16,0.004527999833226204
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,8,0.004595199972391129
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,4,0.0044351998716592785
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,2,0.0044064000248909
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,96,1,0.004473600164055824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,128,0.006620799750089645
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,64,0.005065599828958512
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,32,0.004499199986457825
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,16,0.004521600157022476
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,8,0.004476799815893173
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,4,0.00445760004222393
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,2,0.004518400132656098
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,128,1,0.004377600178122521
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,128,0.006700800359249115
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,1,0.004543999955058098
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,64,0.006524799764156342
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,32,0.004566400125622749
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,16,0.004527999833226204
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,16,0.004790399968624115
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,8,0.004479999840259552
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,4,0.004412800073623657
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,2,0.004364800080657006
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,160,2,0.004428799822926521
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,128,0.008457600325345992
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,64,0.006572800129652024
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,32,0.004710400104522705
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,8,0.004636799916625023
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,4,0.004604800045490265
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,8,0.004492799937725067
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,192,1,0.00453759990632534
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,1,0.004473600164055824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,128,0.00854720026254654
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,64,0.0065151996910572055
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,32,0.004604800045490265
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,16,0.004588799923658371
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,4,0.004572800174355507
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,4,0.00461760014295578
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,256,2,0.0045056000351905824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,128,0.008736000210046769
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,64,0.006543999910354615
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,32,0.006563200056552887
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,16,0.004553600028157234
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,8,0.0046271998435258865
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,2,0.00456320010125637
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,320,1,0.004518400132656098
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,2,0.004323200136423111
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,128,0.010700800269842149
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,64,0.006729599833488464
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,32,0.006524799764156342
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,16,0.004992000013589859
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,16,0.004575999826192856
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,8,0.004611200094223023
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,4,0.0046431999653577805
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,384,1,0.004543999955058098
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,128,0.016835199296474458
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,64,0.008684799820184708
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,32,0.006483200192451477
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,8,0.0047136001288890835
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,4,0.004729599878191948
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,2,0.00461760014295578
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,512,1,0.004851200059056282
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,128,0.02722879946231842
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,64,0.010732799768447876
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,128,0.0349727988243103
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,32,0.006838399916887283
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,16,0.006588800251483918
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,8,0.0047136001288890835
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,4,0.004540799930691719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,4,0.004630399867892265
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,2,0.004495999962091446
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,2,0.004720000177621841
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,768,1,0.004524800181388855
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,64,0.012848000228404998
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,32,0.00843840017914772
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,16,0.006563200056552887
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,8,0.004553600028157234
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1024,1,0.004652800038456917
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,128,0.05090240240097046
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,64,0.02693760097026825
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,32,0.01058880016207695
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,16,0.0066880002617835995
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,8,0.0064800001680850984
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,4,0.00459199994802475
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,2,0.004502400010824204
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,1536,1,0.0045056000351905824
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,128,0.06785920262336731
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,64,0.03562879860401154
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,32,0.012668800354003907
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,16,0.008544000238180161
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,8,0.006569600105285645
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,4,0.005529600009322166
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,2,0.004575999826192856
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,4,0.006486400216817856
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,2048,1,0.004521600157022476
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,128,0.08903999924659729
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,64,0.051583999395370485
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,32,0.02496960014104843
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,16,0.010684800148010255
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,8,0.008614400029182434
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,2,0.004416000097990036
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,3072,1,0.004422400146722794
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,128,0.11848000288009644
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,64,0.06853119730949402
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,32,0.031673601269721983
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,16,0.012611199915409089
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,8,0.008524800091981888
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,4,0.006390400230884552
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,2,0.004726399853825569
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,4096,1,0.004604800045490265
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,128,0.17887040376663207
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,64,0.08918399810791015
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,32,0.04739840030670166
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,16,0.02507199943065643
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,64,0.12032959461212159
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,8,0.010662399977445603
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,4,0.006684800237417221
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,2,0.006508799642324448
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,6144,1,0.004675199836492538
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,128,0.2369472026824951
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,32,0.06241919994354248
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,16,0.031062400341033934
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,8,0.012675200402736665
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,4,0.008534400165081025
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,2,0.006547199934720993
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,8192,1,0.00469760000705719
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,2,0.006697600334882736
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,128,0.34571199417114257
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,64,0.17789759635925292
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,32,0.08442879915237426
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,16,0.04607360064983368
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,8,0.024806399643421174
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,4,0.010585600137710571
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,12288,1,0.0064640000462532045
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,2,0.008534400165081025
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,128,0.4614272117614746
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,32,0.11757760047912598
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,64,0.22863359451293946
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,16,0.061273598670959474
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,8,0.03174079954624176
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,16,0.07650880217552185
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,4,0.012569600343704223
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,16384,1,0.0066592000424861904
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,128,0.5725664138793946
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,64,0.28664000034332277
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,32,0.14631680250167847
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,8,0.04117439985275269
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,4,0.01889919936656952
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,2,0.00865280032157898
TRTLLM,1.2.0rc5,NVIDIA B200,mla_gen_post,default,float16,20480,1,0.006534399837255478
