framework,version,device,op_name,kernel_source,bmm_dtype,num_tokens,num_heads,latency
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,64,0.004646399989724159
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,128,0.006831999868154526
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,8,0.004339199885725975
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,1,0.00451200008392334
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,16,0.004678399860858917
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,32,0.004502400010824204
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,4,0.004579199850559235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1,2,0.004470400139689445
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,32,0.004595199972391129
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,8,0.004556800052523613
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,64,0.004668800160288811
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,2,0.004543999955058098
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,1,0.004380799829959869
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,128,0.006950400024652481
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,4,0.004495999962091446
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2,16,0.004416000097990036
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,128,0.006668800115585327
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,64,0.004524800181388855
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,8,0.004070400074124336
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,16,0.004454400017857551
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,2,0.004399999976158142
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,1,0.004208000004291534
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,4,0.004543999955058098
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4,32,0.004588799923658371
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,128,0.0068000003695487974
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,32,0.0044064000248909
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,16,0.004598399996757508
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,64,0.004608000069856644
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,8,0.004377600178122521
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,4,0.0044511999934911724
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,128,0.008643200248479843
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,2,0.0045471999794244765
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8,1,0.004281599819660187
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,64,0.00461760014295578
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,32,0.004518400132656098
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,16,0.004476799815893173
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,8,0.0044319998472929
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,2,0.004515200108289719
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,4,0.004745600000023842
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,64,0.004639999940991402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,32,0.004543999955058098
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,16,1,0.004534399881958961
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,16,0.004441599920392036
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,8,0.004662400111556053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,128,0.008736000210046769
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,4,0.004342399910092354
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,2,0.004464000090956688
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,32,1,0.004483199864625931
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,128,0.008531200140714646
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,16,0.004620800167322159
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,32,0.004579199850559235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,64,0.0066143997013568875
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,4,0.004656000062823296
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,1,0.0043136000633239744
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,2,0.004403200000524521
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,48,8,0.00451200008392334
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,128,0.006534399837255478
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,64,0.006668800115585327
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,32,0.004508800059556961
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,8,0.004575999826192856
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,4,0.004521600157022476
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,16,0.004534399881958961
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,2,0.004176000133156776
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,128,0.008579199761152267
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,64,1,0.0044064000248909
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,64,0.006524799764156342
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,16,0.004764800146222115
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,32,0.004729599878191948
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,8,0.004569600149989128
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,1,0.0046016000211238865
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,4,0.004726399853825569
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,80,2,0.004540799930691719
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,32,0.00658240020275116
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,64,0.006691200286149978
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,16,0.004662400111556053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,128,0.008473599702119828
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,8,0.004540799930691719
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,4,0.0053311999887228016
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,1,0.004524800181388855
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,96,2,0.004479999840259552
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,128,0.008662399649620057
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,64,0.00663359984755516
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,8,0.004639999940991402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,32,0.00647680014371872
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,16,0.00480320006608963
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,4,0.0045855998992919925
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,2,0.005270399898290634
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,128,0.010655999928712846
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,128,1,0.004556800052523613
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,64,0.00676800012588501
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,32,0.006527999788522721
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,16,0.004710400104522705
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,4,0.0051552001386880875
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,8,0.004796800017356872
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,1,0.004614400118589402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,160,2,0.004560000076889992
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,64,0.008595199882984161
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,128,0.01085439994931221
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,32,0.006496000289916992
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,16,0.006623999774456024
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,8,0.005071999877691269
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,2,0.004572800174355507
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,4,0.004630399867892265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,192,1,0.004447999969124794
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,128,0.012726399302482604
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,32,0.006620799750089645
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,8,0.004732799902558327
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,16,0.0065600000321865085
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,64,0.008636800199747085
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,4,0.004604800045490265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,64,0.01069760024547577
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,128,0.014777599275112152
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,1,0.004540799930691719
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,32,0.006563200056552887
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,16,0.0065151996910572055
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,256,2,0.004764800146222115
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,4,0.004630399867892265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,8,0.004665600135922432
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,2,0.004595199972391129
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,320,1,0.004556800052523613
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,64,0.010780800133943558
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,32,0.00854720026254654
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,128,0.01679999977350235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,8,0.0064800001680850984
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,16,0.006681600213050842
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,2,0.0046720001846551895
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,4,0.004726399853825569
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,128,0.02048960030078888
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,384,1,0.004614400118589402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,64,0.012703999876976013
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,16,0.006937599927186966
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,32,0.008585599809885025
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,4,0.005536000058054924
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,8,0.006595200300216675
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,2,0.005273599922657013
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,512,1,0.0045056000351905824
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,128,0.029187199473381043
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,64,0.014927999675273895
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,32,0.010704000294208527
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,8,0.006752000004053116
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,16,0.008662399649620057
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,1,0.005116799846291542
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,128,0.03706879913806915
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,2,0.004556800052523613
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,768,4,0.006662400066852569
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,64,0.02048960030078888
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,32,0.012723200023174286
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,16,0.008790399879217148
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,4,0.006364800035953522
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,2,0.004649600014090538
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,8,0.006563200056552887
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,64,0.02887359857559204
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,32,0.01618559956550598
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1024,1,0.00459199994802475
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,16,0.010828799754381179
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,128,0.05079039931297302
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,8,0.008668799698352814
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,4,0.0066592000424861904
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,1,0.0047136001288890835
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,128,0.06594880223274231
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,64,0.03706879913806915
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,1536,2,0.006511999666690827
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,32,0.018719999492168425
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,8,0.008816000074148178
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,1,0.004614400118589402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,4,0.006911999732255936
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,2,0.006518399715423584
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,2048,16,0.012729600071907043
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,128,0.09277439713478089
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,32,0.027859199047088622
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,16,0.014796799421310425
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,64,0.05121600031852722
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,8,0.01106560006737709
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,4,0.008566399663686752
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,2,0.006656000018119812
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,128,0.11755520105361938
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,64,0.06676480174064636
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,3072,1,0.006630399823188781
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,32,0.03532800078392029
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,8,0.012937599420547485
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,1,0.00663359984755516
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,16,0.018796800076961516
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,4,0.008595199882984161
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,128,0.1736672043800354
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,4096,2,0.006729599833488464
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,32,0.0489439994096756
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,64,0.09256960153579712
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,16,0.027241599559783936
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,8,0.015481600165367126
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,1,0.006527999788522721
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,2,0.00865280032157898
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,6144,4,0.010976000130176545
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,64,0.12493120431900025
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,128,0.2268160104751587
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,16,0.03519999980926514
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,8,0.018639999628067016
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,32,0.06389120221138
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,4,0.013075199723243714
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,2,0.008659200370311737
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_pre,default,float16,8192,1,0.006496000289916992
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,128,0.0046431999653577805
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,4,0.004620800167322159
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,64,0.0047136001288890835
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,8,0.0049183998256921765
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,2,0.004707200080156326
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,16,0.004633599892258644
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,1,0.0045471999794244765
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1,32,0.004732799902558327
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,32,0.004758400097489357
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,1,0.004444799944758415
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,16,0.004755200073122978
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,128,0.004912000149488449
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,2,0.004560000076889992
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,64,0.0047520000487566
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,8,0.004608000069856644
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2,4,0.004495999962091446
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,128,0.0047231998294591905
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,64,0.00453759990632534
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,8,0.004543999955058098
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,32,0.004656000062823296
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,128,0.006489600241184235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,2,0.00445760004222393
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,4,0.004441599920392036
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,16,0.0049056001007556915
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4,1,0.004428799822926521
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,64,0.004633599892258644
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,8,0.004812800139188766
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,32,0.004704000055789947
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,16,0.004687999933958053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,64,0.004675199836492538
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,4,0.0045311998575925825
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,2,0.004556800052523613
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,128,0.00658240020275116
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,32,0.004652800038456917
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8,1,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,16,0.0045311998575925825
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,4,0.004639999940991402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,8,0.004560000076889992
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,64,0.004630399867892265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,2,0.004569600149989128
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,16,0.004502400010824204
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,8,0.004560000076889992
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,128,0.006543999910354615
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16,1,0.004483199864625931
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,4,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,32,0.005577600002288819
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,2,0.004844800010323525
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,32,1,0.004422400146722794
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,128,0.0065311998128890995
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,8,0.0045471999794244765
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,64,0.004668800160288811
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,16,0.004611200094223023
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,32,0.004665600135922432
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,2,0.004652800038456917
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,128,0.006595200300216675
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,64,0.004745600000023842
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,1,0.004630399867892265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,32,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,16,0.004614400118589402
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,4,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,48,4,0.005071999877691269
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,8,0.004579199850559235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,2,0.004649600014090538
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,64,0.006588800251483918
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,64,1,0.004464000090956688
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,128,0.006748799979686737
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,16,0.004879999905824661
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,32,0.0048191998153924945
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,2,0.004604800045490265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,1,0.0046720001846551895
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,128,0.006777600198984146
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,4,0.004652800038456917
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,64,0.006489600241184235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,32,0.006566400080919266
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,80,8,0.005104000121355057
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,8,0.004675199836492538
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,4,0.004665600135922432
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,16,0.004675199836492538
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,2,0.004598399996757508
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,64,0.006694400310516357
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,128,0.006790400296449661
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,96,1,0.004716800153255462
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,8,0.004633599892258644
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,16,0.004630399867892265
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,2,0.004662400111556053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,4,0.004838399961590767
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,32,0.005119999870657921
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,128,1,0.004812800139188766
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,128,0.008627200126647949
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,32,0.006483200192451477
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,16,0.0065600000321865085
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,64,0.006652799993753433
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,8,0.004879999905824661
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,1,0.004796800017356872
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,64,0.006451199948787689
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,128,0.008729600161314011
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,4,0.00461760014295578
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,32,0.0064800001680850984
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,160,2,0.005248000100255013
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,4,0.004611200094223023
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,2,0.004662400111556053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,8,0.004735999926924706
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,1,0.004681599885225296
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,192,16,0.006483200192451477
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,64,0.006662400066852569
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,128,0.008982399851083756
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,8,0.004761600121855736
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,16,0.0062431998550891874
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,2,0.004691199958324432
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,4,0.004735999926924706
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,128,0.010611200332641601
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,32,0.006726399809122085
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,64,0.008726400136947633
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,32,0.00679360032081604
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,256,1,0.004700800031423568
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,16,0.006566400080919266
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,2,0.0046271998435258865
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,8,0.004796800017356872
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,64,0.00862400010228157
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,16,0.00647680014371872
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,128,0.011036799848079681
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,4,0.004796800017356872
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,8,0.006470400094985962
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,320,1,0.004937599971890449
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,32,0.006649599969387054
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,4,0.004662400111556053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,2,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,384,1,0.004694399982690811
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,128,0.01884160041809082
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,32,0.006681600213050842
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,64,0.00859839990735054
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,4,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,2,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,1,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,8,0.006579200178384781
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,512,16,0.00679360032081604
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,64,0.010828799754381179
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,128,0.029084798693656922
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,8,0.006601600348949433
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,16,0.006694400310516357
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,32,0.008544000238180161
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,4,0.006489600241184235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,128,0.03706879913806915
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,2,0.0046847999095916745
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,64,0.014844800531864166
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,32,0.009020800143480301
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,768,1,0.005011200159788132
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,4,0.006390400230884552
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,16,0.006729599833488464
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,2,0.004681599885225296
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,8,0.006457599997520447
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,64,0.031139200925827025
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,128,0.05140479803085327
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,16,0.008713600039482117
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1024,1,0.004659200087189674
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,8,0.006703999638557434
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,4,0.006441599875688553
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,1,0.004588799923658371
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,32,0.010815999656915664
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,64,0.03931840062141419
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,1536,2,0.0065311998128890995
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,128,0.06715520024299622
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,8,0.006745599955320358
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,16,0.008905600011348724
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,32,0.012947200238704682
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,4,0.0065600000321865085
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,1,0.004687999933958053
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,2048,2,0.006489600241184235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,32,0.027020800113677978
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,16,0.010694400221109391
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,64,0.051849597692489625
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,4,0.006511999666690827
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,128,0.09256960153579712
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,8,0.008640000224113464
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,2,0.00655680000782013
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,128,0.11673920154571533
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,16,0.01271039992570877
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,64,0.0681984007358551
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,3072,1,0.0065600000321865085
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,32,0.031744000315666196
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,2,0.006534399837255478
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,4,0.00655680000782013
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,8,0.008905600011348724
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,128,0.17408000230789183
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,8,0.010870400071144103
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,64,0.09257280230522155
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,4096,1,0.0046271998435258865
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,4,0.008540800213813782
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,16,0.027027198672294618
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,1,0.0064640000462532045
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,2,0.006534399837255478
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,128,0.22231359481811525
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,6144,32,0.04751040041446686
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,32,0.06389759778976441
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,64,0.11816320419311524
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,4,0.008755200356245042
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,16,0.03327040076255798
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,8,0.012851199507713318
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,1,0.006489600241184235
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,8192,2,0.006815999746322632
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,16,0.046079999208450316
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,2,0.00857279971241951
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,64,0.17203520536422728
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,32,0.08868160247802734
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,1,0.006521599739789963
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,8,0.027027198672294618
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,4,0.010623999685049058
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,12288,128,0.3290112018585205
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,64,0.2230304002761841
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,128,0.43498878479003905
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,8,0.033583998680114746
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,16,0.06123520135879516
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,32,0.11632959842681885
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,2,0.008560000360012055
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,4,0.012726399302482604
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,128,0.5446656227111817
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,64,0.27545919418334963
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,16384,1,0.006652799993753433
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,32,0.14295040369033812
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,1,0.008617600053548813
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,16,0.07577599883079529
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,4,0.018435199558734894
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,8,0.04055359959602356
TRTLLM,1.0.0rc6,NVIDIA B200,mla_gen_post,default,float16,20480,2,0.010652799904346467
